Our team provides leading edge serial interface (SerDes) solutions to Huawei worldwide. Join one of the strongest and most successful SerDes development teams in the world and largest mixed signal IC design team in Canada. Work in an enthusiastic and motivated environment on the bleeding edge of technology. Enjoy unlimited access to latest CMOS nodes and HW and SW development tools.
In this role, you will be working as a Physical Design Engineer (Custom Layout) in a team environment performing full-custom analog and mixed-signal layout of next generation high-speed interfaces and signal integrity systems (aka SerDes, PHY, HSS, wireline transceivers, optical transceivers) in deep submicron FinFET technologies. Multiple positions are available in Toronto or Ottawa Design Centers at different seniority levels depending on candidate qualifications.
You will be responsible for layout floor planning, and both block-level and top-level full-custom layout of analog and mixed signal systems. You will put into action your solid understanding of advanced technologies and analog design fundamentals to create high-quality high-speed (>10Gbps) analog and/or low-speed high-precision analog layouts. You will utilize your strong experience in deep submicron CMOS and FinFET technologies. You will also use your strong custom layout experience to supervise less senior layout designers.
Compensation Package Highlights
SerDes, Physical Design, IC, Analog IC, IC design, Custom Layout, Design engineer, , CMOS, FinFET, high speed, Cadence, Virtuoso,