Analog Physical Design Engineer

  • Huawei Technologies Ltd.
  • Ottawa, ON, Canada
  • Apr 25, 2018
Engineering Health Care

Job Description

Our Team

Our team provides leading edge serial interface (SerDes) solutions to Huawei worldwide. Join one of the strongest and most successful SerDes development teams in the world and largest mixed signal IC design team in Canada. Work in an enthusiastic and motivated environment on the bleeding edge of technology. Enjoy unlimited access to latest CMOS nodes and HW and SW development tools.

Position Overview
In this role, you will be working as a Physical Design Engineer (Custom Layout) in a team environment performing full-custom analog and mixed-signal layout of next generation high-speed interfaces and signal integrity systems (aka SerDes, PHY, HSS, wireline transceivers, optical transceivers) in deep submicron FinFET technologies. Multiple positions are available in Toronto or Ottawa Design Centers at different seniority levels depending on candidate qualifications.

You will be responsible for layout floor planning, and both block-level and top-level full-custom layout of analog and mixed signal systems. You will put into action your solid understanding of advanced technologies and analog design fundamentals to create high-quality high-speed (>10Gbps) analog and/or low-speed high-precision analog layouts. You will utilize your strong experience in deep submicron CMOS and FinFET technologies. You will also use your strong custom layout experience to supervise less senior layout designers.


  • MASc or BASc in Electrical Engineering or equivalent degree
  • MASc or 5 years + BASc of relevant experience in Analog full-custom layout
  • Must have experience in deep submicron CMOS (28nm or below)
  • Experience in FinFET technologies is a strong asset
  • Must have recent hands on experience with Cadence Virtuoso and Virtuoso-XL tools and environment
  • Experience in SKILL programming, Mentor Calibre DRC/LVS/PERC, and Apache Totem EM & IR analysis is a plus
  • Experience in layout lead roles and top-level layout integration is an asset
  • Experience in high-speed analog layout is an asset
  • Knowledge of analog design fundamentals including one of: SerDes, ADC/DAC, high-speed digital, RF, PLL is a plus

Compensation Package Highlights

  • Competitive Salary, Bonuses, and Group R.R.S.P
  • Comprehensive Beenfits Packages – (Dental, Vision, and Medical)
  • Short and Long-term Disability Insurance
  • Relocation Assistance

Key words

SerDes, Physical Design, IC, Analog IC, IC design, Custom Layout, Design engineer, , CMOS, FinFET, high speed, Cadence, Virtuoso,