IC Packaging and SI/PI Engineer

  • Huawei Technologies Ltd.
  • Ottawa, ON, Canada
  • Apr 25, 2018
Engineering Health Care

Job Description

Our Team

Our team provides leading edge serial interface (SerDes) solutions to Huawei worldwide. Join one of the strongest and most successful SerDes development teams in the world and largest mixed signal IC design team in Canada. Work in an enthusiastic and motivated environment on the bleeding edge of technology. Enjoy unlimited access to latest CMOS nodes and HW and SW development tools.

Position Overview
In this role, you will be working as a IC Packaging and SI/PI Engineer in a team environment performing full-custom analog and mixed-signal layout of next generation high-speed interfaces and signal integrity systems (aka SerDes, PHY, HSS, wireline transceivers, optical transceivers) in deep submicron FinFET technologies. Position is available in Toronto or Ottawa Design Centers at different seniority levels depending on candidate qualifications.


  • Conduct package routing feasibility for our high-speed Serdes design;
  • Work with the layout team to optimize our Serdes bumpout for an optimal package solution;
  • Work on the electrical modeling and validation of package and PCB;
  • Work with Serdes designers for various RF circuit/component designs;
  • Conduct SI and PI modeling, simulation, and characterization high-speed serial interface;
  • Develop and execute test plans to validate signal and power integrity.


  • Bachelor with 5+ years, or M.S.E.E. with 4+ years, or Ph.D. with 3+ years of experience in High Speed, RF, microwave circuit/component design, etc.;
  • Good knowledge on transmission line and EM theory;
  • Hands on experience in wire-bond and flip chip BGA design;
  • Experience in advanced package technologies such as multi-layer buildup and ceramic substrate, interposer, fanout and other wafer-level packaging will be a plus.
  • Familiarity with commercial tools such as HFSS, EMX, PowerSI, SIWave, Momentum, ADS, Hspice, etc.
  • Knowledge on multi-gigabit serial links for Backplane and chip-to-chip interfaces meeting CEI, XFI, XLAUI, SFI, PCIe, KR, OIF-LR, VSR and other standards will be a plus;
  • Solid foundation in theory and operation of VNA, Oscilloscope, TDR, Probe Station, BERT, etc.
  • Good communication and presentation skills.

Compensation Package Highlights

  • Competitive Salary, Bonuses, and Group R.R.S.P
  • Comprehensive Beenfits Packages – (Dental, Vision, and Medical)
  • Short and Long-term Disability Insurance
  • Relocation Assistance

Key words

SerDes, IC Packaging Design, IC, SI/PI,