Analog Design Engineer

  • Huawei Technologies Ltd.
  • Ottawa, ON, Canada
  • Feb 23, 2018
Engineering Front End Development Health Care R&D

Job Description

Our Team

Our team provides leading edge serial interface (SerDes) solutions to Huawei worldwide. Join one of the strongest and most successful SerDes development teams in the world and largest mixed signal IC design team in Canada. Work in an enthusiastic and motivated environment on the bleeding edge of technology.

Position Overview

In this role, you will be working in a team environment conducting research and development into next generation high-speed interfaces and signal integrity systems (aka SerDes, PHY, HSS, wireline transceivers, optical transceivers) in deep submicron FinFET technologies.

Multiple positions are available at different seniority levels (Junior to Principal) depending on candidate qualifications. Positions are available in Toronto or Ottawa Design Centers

Responsibilities

You will be responsible for large analog and mixed signal systems, specification, design and layout. In this role you may coach and supervise more junior designers and will interface with other engineering disciplines (custom layout, digital, firmware, and application/test).

You will put into action your solid understanding of analog circuit design fundamentals, and demonstrate an aptitude for creative or advanced circuit design. You will utilize your strong experience in deep submicron CMOS and FinFET high speed mixed signal or RF design, as well as in one or more of the following: SerDes, equalization systems, RF front end, or PLL. You will also use your strong custom layout experience to supervise layout designers.

Qualifications

  • PHD or MASc in Electrical Engineering or equivalent degree
  • PHD or 2 years + MASc of relevant experience in Analog/Mixed Signal design
  • Must have experience in deep submicron CMOS (28nm or below)
  • Experience in FinFET technologies is an asset
  • Experience in optical communication, silicon photonics, or package design is an asset
  • Must have experience in one or more of the following: ADC/DAC, SerDes, optical, high speed digital, RF, PLL design
  • Must have: recent hands on experience with Cadence tools and environment

Compensation Package Highlights

  • Competitive Salary, Bonuses, and Group R.R.S.P
  • Comprehensive Benefits Packages- (Dental, Vision, and Medical)
  • Short and Long-term Disability Insurance
  • Relocation Assistance

Key Words

SerDes, analog, IC, analog IC, IC design, Analog engineer, engineer, CMOS, FinFET, Matlab+ Simulink, high-speed IC design, high speed, layout in Cadence Virtuoso