Junior System Engineer - a job position in the System Team (HiLink SerDes)
Excellent DSP and Digital Communications design engineering opportunity to work on challenging high-speed communication systems, focusing on digital signal processing and PHY baseband algorithms/modeling and concept. The desired candidate will immediately work on cutting-edge communications algorithms design, modeling, and analysis.
• Modeling & analysis of performance of high-speed transceiver (SerDes) at system level
• Develop channel models and run simulations to help define transmitter and receiver architecture
• Develop MATLAB, Simulink system models for simulation, verification, and BER evaluation
• Run system-level simulations to evaluate architectural tradeoffs
• Document signal-processing block requirements, architecture and lab test plan
• Analyze and optimize SerDes transceiver's calibration and adaptation algorithms
• Work with digital design team to perform bit-true matching for digital RTL design
• Perform lab testing and debug
• Ph.D. or Masters in electrical/digital communication engineering
• Strong background in equalization, timing recovery, communications theory, linear systems analysis, and signal processing
• Good understanding of error control coding (FEC) is desirable
• Graduate courses/work experience particularly in Communication Theory and Digital Signal Processing algorithms is a must
• 4+ years of academic/working experience using Matlab and Simulink
• Should have good communication skills, excellent team-work spirit, and is capable of independent work with guidance.